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Re: [PATCH/RFC] fix missing tlb flush on x86 smp+pae
Hi,
On Fri, Mar 16, 2001 at 09:10:49AM -0800, Linus Torvalds wrote:
>
> > On Intel, yes. The PAE case is a special case: we lose one bit of
> > addressing for each level of page table because the pte width has
> > doubled, so the two-level page table is short of two bits of address
> > coverage in PAE mode.
>
> I would almost tend to suggest that we just always allocate the PAE. Do it
> at the same time we allocate the page directory - make PAE use
> "get_pgd_slow()", and just always allocate the 3 pages. Much simpler.
It would probably be worth it: the binary, libraries and stack are
going to populate all 3 pages almost immediately anyway. I just hate
tweaking code just after we've finally got it stable. :)
--Stephen
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