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Re: [PATCH/RFC] fix missing tlb flush on x86 smp+pae


On Fri, 16 Mar 2001, Stephen C. Tweedie wrote:
>
> On Intel, yes.  The PAE case is a special case: we lose one bit of
> addressing for each level of page table because the pte width has
> doubled, so the two-level page table is short of two bits of address
> coverage in PAE mode.

I would almost tend to suggest that we just always allocate the PAE. Do it
at the same time we allocate the page directory - make PAE use
"get_pgd_slow()", and just always allocate the 3 pages. Much simpler.

		Linus

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