Re: active_mm & SMP & TLB flush: possible bug

["Manfred Spraul" <masp0008@stud.uni-sb.de>]

>> BTW, where can I find more details about the active_mm implementation?
>> specifically, I'd like to know why active_mm was added to
>> "struct task_struct".
>> >From my first impression, it's a CPU specific information
>> (every CPU has exactly one active_mm, threads which are not running have
>> no
>> active_mm), so I'd have used a global array[NR_CPUS].
>
>That soulds like a good idea -- care to offer a patch? =)

I know you should not reply twice to one mail, but I noticed that my initial
assumption was wrong:
It seems that the MMU caches can contain data from multiple
"struct mm_struct"'s on the PPC cpu, perhaps this also applies to
other CPU's.
It's Intel specific that the TLB contains data from just one mm_struct.


--
    Manfred


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