active_mm & SMP & TLB flush: possible bug

[Manfred Spraul <manfreds@colorfullife.com>]

I think that active_mm breaks CLEVER_SMP_INVALIDATE
(linux/asm-i386/pgtable.h)
(version 2.3.11)

e.g. flush_tlb():
CPU 1 executes thread A, CPU2 waits in
the idle thread with a lazy TLB context of thread A.

CPU1: flush_tlb() causes no IPI because
current->mm->mm_users is still 1.

if these 2 CPU switch their roles, then we use an outdates
TLB cache.

-------------
BTW, where can I find more details about the active_mm implementation?
specifically, I'd like to know why active_mm was added to
"struct task_struct".
From my first impression, it's a CPU specific information
(every CPU has exactly one active_mm, threads which are not running have
no
active_mm), so I'd have used a global array[NR_CPUS].


	Manfred
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