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Re: 4M kernel pages

To: "David Mentr\\'e" <David.Mentre@irisa.fr>
Subject: Re: 4M kernel pages
From: Petko Manolov <petkan@varel.bg>
Date: Mon, 16 Nov 1998 17:06:46 +0200
CC: linux-mm@kvack.org
Organization: Varel Ltd.
References: <Pine.LNX.3.96.981113150452.4593A-100000@mirkwood.dummy.home> <364FE29E.2CF14EEA@varel.bg> <wd8emr3yfeu.fsf@parate.irisa.fr>
Sender: owner-linux-mm@kvack.org

David Mentr\'e wrote:
> 
> Petko Manolov <petkan@varel.bg> writes:
> 
> > Also we have less TLB misses when the kernel is in 4M page.
> 
> The kernel is already using 4M pages (for a long time now).

Yes, i know that. I took a look at 
linux/arch/i386/mm/init.c - paging_init().
Yes we rise PSE bit in cr4 but don't rise the PS bit in
the pade directory entry for the kernel - which means the
kernel is in 4K pages.

regards
-- 
Petko Manolov - petkan@varel.bg
http://www.varel.bg/~petkan
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Follow-Ups:
- Re: 4M kernel pages
  - From: "David Mentr\\'e" <David.Mentre@irisa.fr>

References:
- Re: May be stupid question ;-)
  - From: Rik van Riel <H.H.vanRiel@phys.uu.nl>
- 4M kernel pages
  - From: Petko Manolov <petkan@varel.bg>

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