Re: Doubt regarding memory

[Tzahi Fadida <Tzahi.ML2@xxxxxxxxx>]

On Sunday 04 March 2007 14:21, Mulyadi Santosa wrote:
> > I have a feeling i did not understand how many virtual pages the MMU can
> > address. Can anyone correct me/clarify?
>
> Neither do I, I am still reading about it. So, if you can help us here
> clarifying this issue, personally I welcome your help.

Well, i checked it out again and i misscalculated a bit. You actually can 
address the whole 4gb. It works like this: You have a Page Directory Page 
(PDP) which contains 1024 entries of 4 bytes that each points to a Page Table  
Page (PTP) that each contains 1024 entries of 4 bytes that points to a 4096 
bytes pages of physical memory. i.e. 1024 * 1024 * 4096 = 4gb of addressable 
memory. Once you wish to do context switching, you change the CR3 register to 
points to the process's PDP. I also understand that some architectures cache 
some of this page tables and when you need another part of the table it is 
assisted by hardware/software, which is what got me confused of how much it 
can hold in the first place. I was probably looking at the cache instead of 
the real table.

-- 
Regards,
        Tzahi.
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Tzahi Fadida
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