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Re: What is bit 5- bit 30 in MSW (Machine Satus Word)?


On Mar 9, 2006, at 12:28 PM, Yang Huang wrote:

Hi list,

In previous mail discussing how to disable the CPU cache, I got
another question, which I guess it would be better to make a new
thread.

I search for a while, but without satisfied answer. As for CR0, the
Machine State Word Register, almost all documents give the following
info:

      |31|30-5|4|3|2|1|0|  Machine Status Word
        |   |  | | | | +---- Protection Enable (PE)
        |   |  | | | +----- Math Present (MP)
        |   |  | | +------ Emulation (EM)
        |   |  | +------- Task Switched (TS)
        |   |  +-------- Extension Type (ET)
        |   +---------- Reserved
        +------------- Paging (PG)


Read your processor datasheet for more info.
On Pentium IV there are 5 bits you can set: 30 (CD-cache disable) 29(NW-Not Write Through) 18(AM-Align-Mask) 16(WP) (Write-Protected) 5(NP-Numeric Error)
Other bits between 5 and 30 are reserved.

-----------
Oldani (sgrakkyu) Massimiliano

Antifork Research, Inc.
Metro Olografix


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