--- tousanjay <tousanjay@xxxxxxxxxxx> wrote:
>
>
> Thanks Gaurav
> Some more quries ;-)
> Which one of the two masking or disabling of
> interrupts results in
> lost interrupts?
> As far as my understanding from the explanation you
> gave, masking will
> result in interrupts lost whereas disabling
> interrupts will queue the
> m and they will be services as soon as interrupts
> are enabled again.
see, when interrupts are masked at PIC level, they are
queued so that they can he forwarded to CPU when they
unmasked, but I think only one interrupt per masked
interrupt lines is queued, if that interrupt line is
getting more than one interrupt, those will be lost
(this is my understanding, I might be wrong, can some
one on group confirm).
If you are disableing the interrupts at CPU level ....
those will be lost and will not be queued.
--gd
>
> Please correct me.
> Thanks and Regards
> Sanjay
>
>
> --- In lkg_india@xxxxxxxxxxxxxxx, Gaurav Dhiman
> <gauravd_linux@xxxx>
> wrote:
> >
> > Hi,
> >
> > There is a small difference in masking and
> disabling
> > the interrupt, well both have same effect that
> > interrupts are note received by CPU, but both have
> > different scopes.
> >
> > Masking is done at PIC level by enabling the bit
> > corresponding to the interrupt line we want to
> mask.
> > By masking a particular interrupt line at PIC
> level,
> > we make sure that PIC do not forward any interrupt
> to
> > CPU received on that line.
> >
> > As there can be more than one device connected to
> > single PIC incoming line, so all the devices
> connected
> > to masked interrupt line on PIC wont be able to
> send
> > their interrupt signals to CPU.
> >
> > Disabling interrupts is done at CPU level, for
> intel
> > CPUs, this is done by "cli" instruction. By doing
> this
> > CPU does not respond to any of the interrupts from
> > outer world.
> >
> > As far as the "local_irq_disable" is concerned,
> for
> > i386, this is a macro defined as follows:
> >
> > #define local_irq_disable() __asm__
> > __volatile__("cli": : :"memory")
> >
> > So you can see here, this macro (on i386) disables
> the
> > interrupts, so after this CPU wont respond to
> > interrupts from outside world unless you again
> > re-enable them.
> >
> > cheers !!
> > --gd
> >
> >
> >
> > --- tousanjay <tousanjay@xxxx> wrote:
> >
> > >
> > >
> > > Hi all
> > > New to the group, just joined...
> > > I have confursion about interrupt
> masking/disabling
> > > What is the difference between masking of
> interrupts
> > > and disabling of
> > > interrupts.
> > >
> > > To my understanding when a device interrupts, a
> > > signal flow from the
> > > device to the interrupt controller and then from
> > > intr controller to
> > > processor. Something like...
> > > device ---1---> interrupt_controller
> > > ---2--->processor
> > > I guess the masking happens at 1 and disabling
> at 2.
> > > Is my understanding correct?
> > > Also when i do local_irq_disable, does it masks
> the
> > > interrupt or it
> > > disables the interrupt.
> > >
> > > Thanks and Regards
> > > Sanjay Kumar
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > > Yahoo! Groups Links
> > >
> > >
> > > lkg_india-unsubscribe@xxxxxxxxxxxxxxx
> > >
> > >
> > >
> > >
> > >
> > >
> >
> >
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