Re: PCI register questions..

[Erik Mouw <J.A.K.Mouw@its.tudelft.nl>]

On Tue, Feb 04, 2003 at 12:34:07PM +0100, Jules Bj?rn Colding wrote:
> This is what I know:
> 
> 1) I have to enable all GPIOs on the board before I can access the
> co-processor. This is done by writing 0x2 to register offset 0x40 at the
> PCI data configuration register. Before doing so I have to enable reads
> and writes to this register. These two lines does that:
> 
> /* Write to the pci configuration address register */
> outl(0x80000000 | (0xc << 11) | (0x40 << 2), 0xcf8)
> 
> /* Write to the pci configuration data register */
> outb(0x02, 0xcfc)

Don't fiddle with the PCI config space like that. We have the function
pci_write_config_byte() and friends for that. If you use those
functions, your driver will be portable, so it will work without
changing a single line of code the minute you put it in a PowerPC
machine. Another advantage is that using the pci_*() functions make
your code much more readable.

> But.. 
> 
> a) Do I need to do a request_region()/release_region() for both
> addresses around these lines of code ?

No, just use the pci_*() functions. First pci_enable() the device, then
get request the regions with pci_request_regions() and enable bus
mastering with pci_set_master(). In my opinion drivers/net/8139too.c is
a nice example of proper PCI usage.

> b) Do I need to disable interrupts while writing to these registers ?

If you do it like you're doing right now you have to, but if you use
the pci_*() functions the necessary precautions will be done
automatically.

> c) Do I need to reset 0xcf8 after having written to 0xcfc ?

Use the pci_*() functions and don't worry about the implementation
details.


Erik

-- 
J.A.K. (Erik) Mouw
Email: J.A.K.Mouw@its.tudelft.nl  mouw@nl.linux.org

PGP signature