PCI register questions..

[Jules Bjørn Colding <JuBColding@yorkref.com>]

Hi all,

My problem is that I have to write a driver for a co-processor on a
board which we will use, at my work, as an embedded controller. The
board itself is based upon a 486. The co-processor has been bolted onto
the PCI/ISA bridge with nine of its pins.

I am almost where I can start to access it but I have a few remaining
questions.

This is what I know:

1) I have to enable all GPIOs on the board before I can access the
co-processor. This is done by writing 0x2 to register offset 0x40 at the
PCI data configuration register. Before doing so I have to enable reads
and writes to this register. These two lines does that:

/* Write to the pci configuration address register */
outl(0x80000000 | (0xc << 11) | (0x40 << 2), 0xcf8)

/* Write to the pci configuration data register */
outb(0x02, 0xcfc)


But.. 

a) Do I need to do a request_region()/release_region() for both
addresses around these lines of code ?

b) Do I need to disable interrupts while writing to these registers ?

c) Do I need to reset 0xcf8 after having written to 0xcfc ?


Thanks a lot in advance! 
  jules

--
Kernelnewbies: Help each other learn about the Linux kernel.
Archive:       http://mail.nl.linux.org/kernelnewbies/
FAQ:           http://kernelnewbies.org/faq/